Embedded Systems & Computer Vision

DMS on CV181x

A C inference pipeline for constrained hardware: sparse face detection, tracked regions, lightweight landmarks, and per-stage timing.

2025 – Present · Remote

Shanghai Ben’an Intelligent · Research Engineer, Driver State Monitoring (DMS) · Internship

CCV181xSCRFDPFLDTPU-MLIRONNXEmbedded inference
Why it sits here. Hardware-aware internship work connecting a low-power edge pipeline to real cabin-video validation and replay-driven engineering.
02 / Closer to the silicon. Closer to the world.STUDY IN SPACE

01 / IMPLEMENTATION & CONTRIBUTION

What the work involves

Fit the DMS model pipeline to the low-power CV181x edge SoC during the Shanghai Ben’an Intelligent internship. Tightened inference cadence and per-stage compute budgets while adapting a supplied C service, landmark backends, and model-conversion packaging.

Technical depth

Sparse SCRFD detection with per-frame landmark tracking and ROI updates; legacy 478-point and 68-point backends; callbacks and display work moved off the per-frame critical path; timestamp-window PERCLOS; per-stage latency and tracking instrumentation; ONNX to CV181x BF16 conversion.

The project family

dms_cv181x_fastpath/dms_work

02 / RESULTS

What came out of it

Validated the end-to-end pipeline on real cabin video, with inference-cadence checks and per-stage compute budgeting. The internship record connects this edge pipeline to shadow-mode hard-case capture, review, and replay-based reporting.

03 / SUPPORTING EVIDENCE

Follow the source

Implementation notes, project records, and supporting artifacts.

Source context & project scope

The latest candidate-provided internship record updates the earlier repository-only hardware-validation status. It describes on-device deployment and end-to-end cabin-video validation; no numeric latency or accuracy benchmark is supplied.

20 ms remains a target, not a claimed achieved measurement.

SCRFD and PFLD are upstream models; original model training is not claimed.

Company-specific source is not mirrored on this website.

The code computes sample ratios inside a timestamp window; do not describe it as exact time-integrated PERCLOS.

Deployed and validated real-time on-device driver-state monitoring, connecting safety-relevant alerts, low-power edge inference, and replay-driven validation. Deployed and validated eight safety-relevant detector classes: eye closure, yawning, distraction, phone use, smoking, face loss, lens occlusion, and eye anomaly. Shipped a 616-test pytest suite with replay-driven regressions, inference-cadence checks, and per-detector coverage metrics alongside model development. Designed the alert state machine with hierarchical face-loss and lens-occlusion fallbacks. Speed, ignition, and gear gating suppress false alarms in non-driving states; persisted per-camera calibration profiles support fleet-grade traceability. Fit the model pipeline to the low-power CV181x edge SoC by tightening inference cadence and per-stage compute budgets. Validated end-to-end on real cabin video and built the lab CLI for shadow-mode hard-case capture, human review, and replay-based metric reporting.

CANDIDATE · 2025 – Present

Historical architecture and bundle-status record, including hardware checks that were still open at that snapshot. Donald’s later internship update describes on-device deployment and real cabin-video validation.

SOURCE · 2026-09-17

Sparse detector scheduling, tracked ROI, landmark backends and latency fields.

SOURCE · 2026-09-17

Vendor SCRFD provenance, public PFLD ONNX provenance and BF16 conversion notes.

SOURCE · 2026-09-17

Critical-path and API problems motivating the refactor; model availability statements are older than the main README.

SOURCE · 2026-09-17
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VGGT scene reconstruction