Systems & automationProject record · Sep 2026

Software Systems & Automation

ISAFE / WITNESS — SOP verification

An assembly-inspection prototype that tracks procedure steps, flags skips and ordering errors, and attaches video evidence for review.

PythonFastAPIPydanticNumPySoft-DTWDAG/FSMQwen2.5-VLPyTorchbitsandbytesDINOv2FAISSSQLitePostgreSQLMQTTWebSocket
Why it sits here. An end-to-end workflow connecting perception, procedure logic, evidence review, storage, and an operator interface.
05 / An architecture, opened up.STUDY IN SPACE

01 / IMPLEMENTATION & CONTRIBUTION

What the work involves

Donald built the Python backend, integrated perception and adjudication components, repaired conformance logic, and iterated the review interface. Perception and vision-language models are upstream integrations.

Technical depth

SOP steps form a DAG; sustained observations debounce noisy detections. Mandatory-ancestor precedence distinguishes alternate paths, skipped steps, and late wrong-order completions. Soft-DTW is downsampled and normalized to bound per-frame work. Evidence clips feed a second-opinion adjudicator, with a hash-chained audit ledger and SQLite/Postgres seams.

The project family

aisop

02 / RESULTS

What came out of it

The prototype connects few-shot registration, step conformance, video evidence, adjudication, persistence, and a review console. Its documented mock-perception acceptance scenario deliberately skips assembly step C to exercise procedure checking.

03 / SUPPORTING EVIDENCE

Follow the source

Implementation notes, project records, and supporting artifacts.

Source context & project scope

Mock CPU backends are the default. Real GPU inference and industrial deployment were not demonstrated by this audit.

The current natural-language SOP compiler is a deterministic keyword parser; its LLM-backed compiler is a TODO seam despite broader product-language claims.

Qwen2.5-VL 3B uses an opt-in NF4 4-bit adapter with visual-token bounds; parser tests do not establish real model accuracy.

Field-signal adapters are stubs; production safety or defect-reduction outcomes are not established.

Product surfaces, module layout, mock default, optional real backends, and skipped-step acceptance demo.

SOURCE · 2026-09-17

DAG mandatory ancestors, three-frame persistence, skip/wrong-order reclassification, bounded normalized soft-DTW.

SOURCE · 2026-09-17

Lazy-loaded Qwen2.5-VL, NF4 quantization, bounded visual input and generation, uncertainty-preserving output parsing.

SOURCE · 2026-09-17

Audit hash creation and chain validation.

SOURCE · 2026-09-17

Deterministic compiler implementation and explicit LLM TODO.

SOURCE · 2026-09-17

Donald Shen commits for backend implementation, integration, and confirmed bug repairs.

SOURCE · 2026-09-17
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